1. Field of the Invention
The present invention relates generally to a semiconductor device using a film carrier, and more particularly to a wiring structure of a high-speed operation semiconductor device using GaAs semiconductor, etc.
2. Description of the Related Art
With recent development in higher integration of an LSI or an IC, the number of electrode pads of a semiconductor device (hereinafter called "chip") to be supplied with input/output signals or electric power has increased more and more. As a result, power consumption has increased, and the operation speed has also increased. For example, a high-speed operation of about 100 ps is performed in an integrated circuit constituted by integrating field-effect transistors (FET) on a gallium-arsenic (GaAs) substrate. In addition, devices capable of operating at higher speeds, such as an HEMT (High-Electron Mobility Transistor) and an HBT (Hetero Junction Bipolar Transistor), have been developed.
In the prior art, bonding wires have been used to connect wires of a semiconductor device package with bonding pads on a chip. There is, however, such a problem that the bonding wires, which are connected in an arcuated fashion, may serve as open stubs in an integrated circuit performing high-speed signal processing of giga-bit/sec. and the length of each bonding wire is not negligible. Another problem is that the uniformity of electrical characteristics is lost owing to variations in the length of bonding wires. If the density of bonding pads increases as the integration of the integrated circuit becomes higher, bonding is made impossible owing to the contact between a bonding tool and adjacent wires. Furthermore, since the size and pitch of pads cannot be decreased so much, the reduction in chip size is limited. Consequently, the length of signal wires on the chip cannot be decreased.
FIG. 1 illustrates a technique which has been developed to mount a high-speed-operation integrated circuit, without incurring the above problem. This technique is called TAB (Tape Automated Bonding), in which metal foil wires are formed on an elongated flexible film substrate (hereinafter referred to as "film"). The wires are connected to input/output electrode pads on a chip via projection electrodes (bumps). The mount mode using TAB technique is generally called "film carrier."
FIG. 1 shows an important part of an elongated tape-like film 10. Openings 12 serving as chip mounting areas are successively formed in the film 10. A chip 14 is mounted in each opening 12. A plurality of lead wires 34 provided around the opening 12 are connected to the chip 14. Four openings 20 are formed so as to surround the opening 12 and the lead wires 34 provided on the film 10.
A resin mold 24 is applied onto a film region 22 surrounded by openings 20, as shown in FIG. 2A. Thereafter, four bridge portions 26 of the film 10 are cut, and the film region 22 is separated, as shown in FIG. 3. A semiconductor device is thus fabricated. The semiconductor device is placed on a substrate 28, as shown in FIG. 2A, and the lead wires 34 are connected to external electrodes 30. A heat radiation plate 32 is mounted on the bottom of the chip 14.
FIG. 2B is an enlarged view of a connection area where the outer lead 38 shown in FIG. 2A is connected to the external electrode 30 on substrate 28. The film region 22 is surrounded by resin mold 24. The wires on the film 10 are extended, and the wire portions below which no film is provided are extended outside of the resin mold 24. These wire portions are connected, as outer leads 38, to the external electrode 30 on the substrate 28.
The lead wires 34 serve as signal lines. Each lead wire 34 comprises an inner lead 36 connected to the chip, an outer lead 38 connected directly to the external electrode 30, and a portion 40 (hereinafter referred to as "intermediate lead") situated between the leads 36 and 38. The inner lead 36 projects from the film 10 and extends to an electrode pad (not shown), and the lead 36 and electrode pad are connected via a bump electrode.
The four openings 20 function to expose the bottom surfaces of the outer leads 38. As is shown in FIG. 3, when the semiconductor device has been fabricated, most parts of the bottom surfaces of outer leads 38 need to be out of contact with the film 10; thus, the outer leads 38 are arranged on the openings 20 in advance.
The elongated bridge portions 26 are provided between the four openings 20. The four bridge portions 26 support the lead wires 34 on the film region 22.
Feed perforations 42 for feeding the film 10 are formed at regular intervals in both side edge portions of the film 10, as shown in FIG. 1.
Where the above-described high-speed operation integrated circuit chip 14 is actually mounted, it is necessary to keep constant the characteristic impedance of signal lines 34 on the film substrate 10. Recently, film carriers have been proposed, which are designed such that the characteristic impedance of metal foil wires 34 on the film 10 is made constant in order to transmit signals at high speed. For example, according to the techniques disclosed in Published Unexamined Japanese Patent Application (PUJPA) No. 64-14933, PUJPA No. 64-14934 and PUJPA No. 63-302531, the characteristic impedance of transmission lines 34 on film 10 is set at 50 .OMEGA. for practical use.
FIG. 4 is a cross-sectional view of a so-called ground suspended coplanar transmission line, and FIG. 5 is a cross-sectional view of a microstrip line. Both FIGS. 4 and 5 are those taken along line A--A in FIG. 1.
In FIG. 4, the width of the signal line conductor 34 is W, and a predetermined distance G is provided between a ground conductor 52 and the signal line conductor 34. The film 10 and adhesive sheets 56 are interposed between a bottom ground conductor 54 and a top conductor pattern 34, 52. A distance H is provided between the bottom ground conductor pattern 54 and the top conductor pattern 34, 52. The film 10 is adhered to the conductor patterns 34, 52 and 54 with the adhesive sheets 56 interposed therebetween.
The characteristic impedance of the transmission line with the above structure is determined by the width W, distance G, distance H, thickness M of surface conductor pattern 34, 52, and dielectric constant .epsilon..sub.r of the film 10. For example, when the film 10 is formed of polyimide of dielectric constant .epsilon..sub.r =3.5, the conductors 34 and 52 are made of Cu with thickness M=18 .mu.m, W is set at 50 .mu.m, G is set at 30 .mu.m, and H is set at 75 .mu.m, the characteristic impedance is about 50 .OMEGA.. In this case, thickness A of adhesive layer 56 is 25 .mu.m, and thickness P of film 10 is 25 .mu.m.
In the prior art, outer leads 38 are formed of bare metallic conductors, each is about 3 to 5 mm long. As is shown in FIG. 2B, the transmission lines having a predetermined characteristic impedance are intermediate leads 40 provided on the film 10 within the resin mold. From the intermediate leads 40, bared outer leads 38 extend and are connected to the external electrode 30 on the substrate 28. The bared outer leads 38 do not have the predetermined characteristic impedance, and no film exists below the bared outer leads 38. Even if the package with this structure is mounted on the substrate 28, the characteristic impedance of the bare outer lead 38 differs from those of the intermediate lead 40 and external electrode 30, as shown in an equivalent circuit of FIG. 6. Thus, wave distortion occurs in the electric signal owing to the non-uniformity of the characteristic impedances.
Where an input signal is supplied at normal speed, the non-uniformity of the characteristic impedance is not substantially affected. However, for example, where a high-speed input signal is supplied through signal wire 34 to a MESFET in a signal input unit of a GaAs logical integrated circuit, with the characteristic impedance of lead wire 34 being not uniform, the signal is reflected at the part at which the impedance is not uniform. As a result, the waveform is distorted, and normal logical operation cannot be carried out.
As stated above, regarding a film carrier using TAB techniques, if an outer lead portion, in which the characteristic impedance is not adjusted to be constant, is shaped and connected to an electrode on an external mount substrate, the characteristic impedance of the outer lead portion differs from that of the transmission line on the film carrier and that of the transmission line on the external mount substrate. Thus, the high-speed signal is reflected by the outer lead portion, and the waveform of the electric signal is distorted.